Abstract
In this paper, a Binary Coded Decimal (BCD) topology of modular multilevel inverter with reduced component count is proposed. For the control of this inverter, hybrid control strategy is used. The proposed modular multilevel inverter uses asymmetrical dc sources and reduced number of switches topology. This hybrid modulation technique uses the multicarrier based Pulse Width Modulation (PWM) and the fundamental frequency modulation strategy. The hybrid modulation algorithm is implemented with “NUC140” micro-controller. In comparison with the conventional and some of the recently reported inverter topologies, the proposed inverter topology is able to generate high number of voltage levels in the output by using minimum number of components such as dc sources, power switches and driver circuits. This inverter offers significant performance with less number of components. The feasibility of the proposed topology is confirmed by simulation and experimental results.
Highlights
A Multilevel Inverter (MLI) is an array of power semiconductor switches
The switches in the polarity generation part are operated at the fundamental frequency and the switches in the level generation part are operated by the unipolar phase disposition PWM (UPDPWM)
The feasibility of the proposed Binary Coded Decimal (BCD) topology of multilevel inverter with hybrid control strategy, simulations were carried out using MATLAB/Simulink
Summary
A Multilevel Inverter (MLI) is an array of power semiconductor switches. It has gained increasing attention in industry and research since it was introduced in the 1980s [1]. The main disadvantage of MLI is the requirement of more number of power switches and associated driver circuits with the increase in the number of levels at the output. A BCD topology of modular multilevel inverter with unequal dc sources and reduced number of switches is proposed. The performance of the proposed inverter is controlled by the hybrid control strategy This topology requires lesser number of power switches, power diodes and associated driver circuits than the conventional topologies. These advantages are proved by comparing the proposed topology with the conventional symmetric and various asymmetric optimal topologies reported in the literature. The experimental results of a 9-level inverter are presented and these validate all the theoretically obtained results
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