Abstract

This work faces the problem of the hardware/software (HW/SW) co-design of dedicated electronic digital systems based on heterogeneous parallel architectures. In particular, other than describing the reference HW/SW co-design flow, it proposes an extension of a previous system-level design space exploration approach able to suggest to the designer an HW/SW partitioning of the system functionalities specification and a mapping of the partitioned entities onto an automatically defined ‘heterogeneous multi multi-core processor’ architecture.

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