Abstract

The need for increasing the performance of critical real-time embedded systems pushes the industry to adopt complex multi-core processor designs with embedded networks-on-chip. In this paper we present hp-DCFNoC, a distributed dynamic scheduler design that by relying on the key properties of a delayed conflict-free NoC (DCFNoC) is able to achieve peak performance numbers very close to a wormhole-based NoC design without compromising its real-time guarantees. In particular, our results show that the proposed scheduler achieves an overall throughput improvement of 6.9× and 14.4× over a baseline DCFNoC for 16 and 64-node meshes, respectively. When compared against a standard wormhole router 95% of its network throughput is preserved while strict timing predictability as property is kept. This achievement opens the door to new high performance time predictable NoC designs.

Highlights

  • T HE continuous quest for performance of critical realtime embedded systems pushed the safety-critical systems industry to move from platforms including relatively simple electronic computing units to complex multicore processor designs

  • Our NoC design uses a dynamic scheduler that builds on top of the delayed conflict-free NoC (DCFNoC) [5]

  • DCFNoC is a time-division multiplexing (TDM)-based NoC with unique features that are exploited by our dynamic scheduler design

Read more

Summary

INTRODUCTION

T HE continuous quest for performance of critical realtime embedded systems pushed the safety-critical systems industry to move from platforms including relatively simple electronic computing units to complex multicore processor designs. To avoid those potential conflicts, in the second step, the CDGl is modified by inserting delays to enforce all paths cross all layers, to have the same length. Hp-DCFNoC overcomes this limitation by introducing a dynamic scheduler design that is able to inject more than one flit per cycle by exploiting the existing conflict-free paths (paths that do not share any network resource between them). We exploit two conflict-free situations: (1) packets from two nodes injected in the same slot that do not share any resource along their path and (2) messages injected at different cycles In both cases they will never conflict in DCFNoC. Data transmission and notification phases are overlapped to maximize both throughput and average message latency

SCHEDULER ARCHITECTURE
EVALUATION
AREA OVERHEAD AND FREQUENCY
RELATED WORK
CONCLUSION

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.