How to mix bipolar and MOS technologies in high speed programmable frequency divider design

Abstract

Based on a 165-MHz BiMOS programmable frequency divider, a way to mix bipolar and MOS technologies in high-speed divider design is discussed. It is suggested that the MOS section has to be further divided because of heavy loading on the MOS PRELOAD signal, rendering slow recovery from the preload state. Special circuit configurations are described in detail. The programmable divider has been implemented using the Motorola 2- mu m BiMOS process. Comparing the area occupied by the bipolar section with that of the MOS section, one sees an enormous area reduction achieved by the BiMOS approach. >