Abstract

Intermetal dielectric layers in integrated circuits must be formed at low temperatures and with controlled surface morphology. Some important vacuum processes used for such depositions include bias sputtering and bias chemical vapour deposition. These processes yield planarized layers but often result in very low deposition rates and high levels of damage in underlying devices. In this paper we describe the application of a hollow cathode deposition system to the high rate deposition of planarized silicon oxide films at relatively low target voltages. This system is also of interest because its mirror field minimizes electron bombardment, and hence promises low X-ray damage levels. In this study, a 120 mm diameter target hollow cathode system has been used to study SiO x deposition from SiH 4-N 2O and SiH4 O 2 gas mixtures over a range of operating conditions. Some of these results are compared with those obtained in an asymmetric diode system. It is found that the deposition rate in the hollow cathode is up to 4 times that of the diode for the same input power, and up to 10 times the diode rate for the same applied voltage, all at pressures below 5 Pa. Good void filling and surface planarization has been produced in 1:1 aspect ratio submicron structures. Thickness uniformities of ±3% over a 95 mm diameter and refractive indices of between 1.45 and 1.47 over the substrate surface have been measured. These figures are limited only by the present simple gas feed system. Wet chemical etch rates and electrical breakdown strength are almost the same as thermal SiO 2. Similarly, preliminary Fourier transform IR spectra have displayed Si-O peak positions the same as those of thermal oxide controls. Initial C-V measurements suggest that a fixed oxide charge of about 3 × 10 12 cm −2 is formed with the present operating parameters. Annealing at 750°C reduces this charge to a value of 7.5 × 10 11 cm −2

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