Abstract
Stack machines, or stack based processors, have long been pigeon-holed as FORTH processors; specialised devices with little relevance for high level language applications. The failure of stack machines to address the issue of high level language support, and C in particular, has prevented wider acceptance of this promising technology despite the potential benefits of simpler hardware and low gate counts. Our research has centred upon eliminating cache and memory dependence, reducing the limits imposed by external bandwidths ◊ ◊ This research is sponsored by Microprocessor Engineering Ltd (Southampton U.K.). . Having previously introduced a compact multiple-instruction-per-word stack-based encoding strategy in [Bailey93a], we now present a revised model, assessing its performance with compiled C benchmarks The compiler was developed by Damien Kelly, University of Teesside. , and stressing minimisation of memory dependence.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
