Abstract
It is imperative for any level of cache memory in a multi-core architecture to have a well defined, dynamic replacement algorithm in place to ensure consistent superlative performance. The most prevalently used LRU replacement policy does not acquaint itself dynamically to the changes in the workload. As a result, it can lead to sub-optimal performance for certain applications whose workloads exhibit frequently fluctuating patterns. To overcome the limitation of this conventional LRU approach, our paper proposes a novel counter-based replacement technique which logically partitions the cache elements into four zones based on their ‘likeliness’ to be referenced by the processor in the near future. Categorizing the elements into different zones is achieved with the help of a 3-bit counter that is associated with every cache line. On a cache hit, the corresponding element is promoted from one zone to another zone. Replacement candidates are chosen from the zones in the ascending order of their ‘likeliness factor’ (i.e.,) the first search space for the victim would be the never likely to be referenced zone, followed by the subsequent zones till the most likely to be referenced zone is reached. Periodic zone demotion of elements also occurs to make sure that stale data does not pollute the cache. Experimental results obtained by using the PARSEC benchmarks have shown almost 7% improvement in the overall number of hits and 3% improvement in the average cache occupancy percentage when compared to LRU algorithm.
Highlights
Replacement policies play a vital role in determining the performance of a system
Experimental results obtained by using the PARSEC benchmarks have shown almost 7% improvement in the overall number of hits and 3% improvement in the average cache occupancy percentage when compared to LRU algorithm
To deal with fluctuating data access pattern, it logically partitions the cache into different zones using a 3-bit counter and consistently transports the elements from one zone to another zone in accordance with the input data set pattern and maximizes the hit rate compared to LRU algorithm
Summary
Replacement policies play a vital role in determining the performance of a system. In a multi-core environment, where processing speed and throughput are of essence, selecting a suitable replacement technique for the underlying cache memories becomes crucial. In this study we focus on designing a novel counter based replacement algorithm for shared LLC in a CMP environment which makes decisions at a finegrained block level. To deal with fluctuating data access pattern, it logically partitions the cache into different zones using a 3-bit counter and consistently transports the elements from one zone to another zone in accordance with the input data set pattern and maximizes the hit rate compared to LRU algorithm. To address the shortcomings of the previously discussed algorithms and to improve the overall hit rate, the study proposes a novel counter based replacement technique that logically partitions the cache into four different zones namely-Most Likely to be Referenced (MLR), Likely to be Referenced (LR), Less Likely to be Referenced (LLR), Never Likely to be Referenced (NLR). Replacement, insertion and promotion of data elements take place within these zones in such a manner that the overall hit rate is maximized
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