Abstract

A high-throughput architecture of the CCSDS 122.0-B-1 image compression standard is proposed. The architecture uses a novel memory organization in order to reduce the total memory operations and the number of the individual memories allowing operation without external memories. The architecture has been implemented on space grade and commercial FPGA Device. It achieves 136 MSamples/sec on space grade Virtex 5 QV FPGA while, the maximum horizontal resolution of 4096 samples with 16-bit input samples precision.

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