High-speed voltage-control spintronics memory focused on reduction in write current

Abstract

Low power consumption of high-speed memories such as cache memories will be realized by use of magnetic random access memory (MRAM). We have proposed the voltage-control spintronics memory (VoCSM) as a writing method. The VoCSM has a large operation margin because the current path in writing and the voltage path in reading are separated. The fabrication process we have employed is the two-step self-alignment (TSSA) process that is advantageous for reducing write current and thus addresses one of the MRAM issues. The electrical properties of the VoCSM indicate that the write error rate (WER) steeply decreases depending on write current. This shows the VoCSM is available for low write current. For highspeed operation, differential operation is demonstrated. In this operation, two magnetic tunnel junctions (MTJs) are simultaneously written at write current, and then either of them is in the high-resistance state and the other is in the low-resistance state. Furthermore, we propose and demonstrate that the write current during differential operation is reduced by the U-shape, since the write current beneath two MTJs absolutely flows to the opposite directions in this shape. The VoCSM is suitable for application to high-speed memories.