High‐speed energy‐efficient bi‐directional transceiver for on‐chip global interconnects

Abstract

In this paper, a new bi-directional transceiver has been proposed for high-speed signalling across on-chip global interconnects. The proposed transceiver has two modes of operation namely, the transmitter and the receiver. As a result, two transceivers sitting at the two ends of an interconnect can support two-way communication through the same link. The transceiver has very low small-signal impedance for both modes of operation and thereby supports high bandwidth of the link. Moreover, because of its high transimpedance gain over a large bandwidth in the receiving mode, the signalling current can be reduced to a very low value. The circuit has been designed in 65 nm, 1.2 V process with a global interconnect of length 10 mm and width 1.5 μm. Post-layout simulation of the transceivers with the link gives an energy efficiency of 0.101 pJ/b for a data transmission of 14 Gbps.