High-Speed 200GBytes Data Recorder Utilizing the 512Mbits SDRAM and CompactPCI Bus

Abstract

In 1999, the Japan Aerospace Exploration Agency (JAXA) began developing a high-speed, large-volume and low-power-consumption Solid State Recorder (SSR) for space-use. This aim was to develop a SSR for installation of Earth observation satellites that could store and process large amounts of data. A prototype of the SSR was completed in spring 2004, and an engineering model is currently being constructed. The main features of the SSR are 200GBytes capacity, 2.5Gbps data transmission speed, low weight (25kg) and low power consumption (120W). A 512Mbits Synchronous Dynamic Random Access Memory (SDRAM) with on-board multi-bit Error Detection and Correction (EDAC) mechanism, as well as a CompactPCI bus for fast data exchange, are used to improve the efficiency of data collection and storage capabilities. In this paper, we describe the main feature of the SSR system, and the technologies used in its development and manufacture. Preliminary results of several system tests are also reported. In addition, results of experiments with an older generation SSR on the Mission Demonstration test Satellite-1 (MDS-1), which sought to demonstrate a practical solid-state type recorder in the space environment, are briefly introduced.