Abstract

A novel nonvolatile floating-gate transistor memory device using CdSe@ZnS quantum dots (QDs) embedded the insulating polymer as a charge-storage layer along with the rational design of device structure is presented. The core-shell structure CdSe@ZnS QDs can efficiently trap both holes and electrons under the applied writing/erasing operations, resulting in a considerable threshold voltage shifts (ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ) over 50 V and forming high-conductance (ON) and low-conductance (OFF) states at a gate voltage of 0 V. The value of threshold voltage shift is controlled by writing and erasing voltages, regardless with source-drain voltages. Furthermore, it exhibits a long retention time (the ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> can maintain 76% at 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> s) and outstanding endurance characteristics (>500 cycles), demonstrating extraordinary stable and reliable memory property. Moreover, a thin layer of Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> was introduced as tunneling dielectric layer which is essential for the high-performance floating-gate transistor memory device. The nonvolatile organic transistor memory devices using QDs-based floating gate show great potential application for high-performance organic memory devices.

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