High-performance evolved packet core signaling and bearer processing on general-purpose processors

Abstract

Telecommunications service providers are exploring the use of standard high-volume servers to reduce total cost of ownership while at the same time increasing flexibility, service velocity, and scalability of network functions. This article characterizes performance of general-purpose processors — specifically x86 architecture processors — for signaling and bearer processing representative of a wireless carrier’s call model for a Long Term Evolution Evolved Packet Core. A radio access network emulator was used to stimulate an Evolved Packet Core software stack running on an x86 server. The goal was to prove that standard high-volume servers can execute EPC functions per representative market call models, and that workloads can scale across bearer and control plane at line rate without acceleration technologies. A call model was developed to quantify the performance on Intel® Xeon® Processor based servers using an LTE traffic simulator and a commercial EPC software stack. The traffic models represent bidirectional real-world network traffic during different times of the day. The results were that the test EPC processed control and user plane traffic with 50,000 subscribers with a total payload of 10 Gb/s downlink + 4.8 Gb/s uplink traffic using five cores for the data plane and eight cores for the rest of the system; and the user plane throughput scaled in a single blade environment to 20 Gb/s per socket or 40 Gb/s for a dual socket blade.