Abstract

Ge pMOSFETs with HfO2 gate dielectric and gate lengths down to 125 nm are fabricated in a Si-like process. Long-channel hole mobilities exceed the universal curve for Si by more than 2.5 times for vertical effective fields as large as 1 MV/cm. The mobility enhancement is found to be relevant at submicron gate lengths, and a drive current of 1034 muA/mum is achieved for L=125 nm at VG-VT=VD=-1.5 V. The introduction of halo implants allows significantly improved control of short-channel effects, with approximately three orders of magnitude reduction in source junction off-current. VT rolloff and drain-induced barrier lowering are reduced from 207 mV and 230 mV/V to 36 mV and 54 mV/V, respectively, for the highest n-well dose investigated. Four key logic benchmarking metrics are used to demonstrate that Ge is able to outperform Si down to the shortest investigated gate length, with an almost twofold improvement in intrinsic gate delay. ION=722 muA/mum is demonstrated for IOFF=11 nA/mum at a power supply voltage of -1.5 V, when evaluating from the source.

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