High-Performance Bicmos Circuit Structures

Abstract

This chapter presents high speed BiCMOS circuits including ECL/CMOS, CMOS/ECL interface circuits and a BiCMOS sense amplifier for static memory. Optimal use of the bipolar and MOS transistors pushes BiCMOS circuits to operate toward the limits of standard BiCMOS technologies. The chapter shows readers that the bipolar transistors in BiCMOS circuits not only serve as conventional output drivers, but also play an important role in circuit design such as for voltage clamps, current amplification, and current differential amplification. A generic 0.8µm complementary BiCMOS technology has been used in the circuit design. The time delays of the proposed ECL/CMOS interface circuits, the dynamic reference voltage CMOS/ECL interface circuits, and the BiCMOS sense amplifier are improved by 20%, 250%, and 60% respectively. An analytical circuit delay model for DRV-CMOS/ECL interface circuits, which fits HSPICE simulation results, is addressed. The error between the model and the circuit simulator is within 4%. All the proposed circuits maintain speed advantage until the supply voltage is scaled down to 3.3 V.