Highly stable amorphous indium–gallium–zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure

Abstract

Highly stable amorphous indium–gallium–zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etch-stopper and via-hole structure. The TFTs exhibited 40 cm2/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (Δ V th) at room temperature. The excellent stability is attributed to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at 60°C showed that there was a smaller Δ V th in the AC stress compared with the DC stress for the same effective stress time, indicating that the trapping of the carriers at the active layer–gate insulator interface was the dominant degradation mechanism.