Highly Linear Low Power V-Band Down-Conversion Mixer in SiGe BiCMOS Technology

Abstract

This paper presents a V-band Gilbert-cell down-conversion mixer implemented in 0.13um SiGe BiCMOS process. The mixer consists of a double-balanced Gilbert-cell, on-chip transformer-type baluns for the RF and LO ports, and matching networks. The performance of the mixer is optimized to achieve high linearity, low noise and low power consumption. Based on the measurement results, 1-dB input compression point of 11dBm is obtained at 60 GHz with conversion gain of -9.5 dB with overall DC power consumption of 17.7 mW. The maximum gain of -6.5 dB is achieved at 53 GHz with 3-dB RF bandwidth of 50-60 GHz for LO drive of -2 dBm. IF 3-dB bandwidth is around 5.5 GHz. The chip occupies the area of 483 μm by 482 μm. The mixer has simulated noise figure of 9.5dB. The mixer achieves performance comparable to state-of-the-art V-band mixers with high linearity and low power consumption.