Abstract

A digital pulse processor for a multichannel solid-state detector [1,2] has been designed, using highly integrated analog and digital signal processing circuits. The detector preamplifier output is digitized and a parametrizable synchro is elaborated by a dedicated chipset. The digitized signal is then processed by a finite impulse response filter chip (FIR) whose programming is discussed, after which a pile-up protected peak detector sorts it into a histogram. All parameters are digitally controlled.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call