Abstract
In order to improve the reliability of TFT, an Al2O3 insulating layer is inserted between active fluorine doped indium zinc oxide (IZO:F) thin films to form a sandwiched triple layer. All the thin films were fabricated via low-cost sol-gel process. Due to its large energy bandgap and high bonding energy with oxygen atoms, the Al2O3 layer acts as a photo-induced positive charge blocking layer that effectively blocks the migration of both holes and V o2+ toward the interface between the gate insulator and the semiconductor. The inserted Al2O3 triple layer exhibits a noticeably low turn on voltage shift of −0.7 V under NBIS as well as the good TFT performance with a mobility of 10.9 cm2/V ⋅ s. We anticipate that this approach can be used to solve the stability issues such as NBIS, which is caused by inescapable oxygen vacancies.
Highlights
In order to improve the reliability of Thin film transistors (TFTs), an Al2O3 insulating layer is inserted between active fluorine doped indium zinc oxide (IZO:F) thin films to form a sandwiched triple layer
The inserted Al2O3 triple layer exhibits a noticeably low turn on voltage shift of −0.7 V under NBIS as well as the good TFT performance with a mobility of 10.9 cm2/V·s. We anticipate that this approach can be used to solve the stability issues such as NBIS, which is caused by inescapable oxygen vacancies
Traditional amorphous silicon (a-Si):H based TFTs are being replaced by low temperature poly crystalline silicon (LTPS) and amorphous oxide semiconductor (AOS) because these emerging materials are capable of providing better device performance in terms of mobility
Summary
In order to improve the reliability of TFT, an Al2O3 insulating layer is inserted between active fluorine doped indium zinc oxide (IZO:F) thin films to form a sandwiched triple layer. Due to its large energy bandgap and high bonding energy with oxygen atoms, the Al2O3 layer acts as a photo-induced positive charge blocking layer that effectively blocks the migration of both holes and Vo2+ toward the interface between the gate insulator and the semiconductor.
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