Highly efficient monolithic perovskite silicon tandem solar cells: analyzing the influence of current mismatch on device performance

Eike Köhnen,Anna Belen Morales-Vilches,Amran Al-Ashouri,Bart Macco,Marko Jošt,Steve Albrecht,Bernd Stannowski,Rutger Schlatmann,Philipp Tockhorn,Bernd Rech,Lars Korte,Lukas Kegelmann

doi:10.1039/c9se00120d

Abstract

We present a highly efficient monolithic perovskite/silicon tandem solar cell and analyze the tandem performance as a function of photocurrent mismatch with important implications for future device and energy yield optimizations.

Highlights

The well-established technology of silicon solar cells dominates the photovoltaic market
This is highly important for precise energy yield analysis as the fill factor (FF) enhancement under nonmatching conditions mitigates the power conversion efficiency (PCE) loss that would be expected on the basis of JSC loss.[18]
Further improvements of the rear junction silicon bottom cell with adjusted n-type nanocrystalline silicon oxide layer (nc-SiOx):H layer thickness, the ntype top cell contact with proper ALD SnO2 deposition temperature and indium zinc oxide (IZO) thickness, as well as adjusted perovskite thickness led to a remarkable tandem PCE of 26.0%

Summary

Introduction

The well-established technology of silicon solar cells dominates the photovoltaic market. With a current record power conversion efficiency (PCE) of 26.7% on interdigitated back contacted silicon heterojunction solar cells (SHJ),[1,2] silicon solar cells are approaching their theoretical efficiency limit of 29.4%.3. To exceed this limit signi cantly, multiple absorbers with different band gaps can be combined into a multijunction solar cell architecture to exploit the solar light more efficiently than a single junction. The monolithic integration of a perovskite top cell on a silicon bottom cell is challenging due to material and processing restrictions. Mostly silicon heterojunction (SHJ) bottom cells are utilized due to the well-passivated c-Si wafer surface which leads to high open circuit voltages (VOCs).[4,5,7,19,20] Recently, the p–i–n architecture for perovskite top-cells prevailed over the n–i–p architecture, especially due to temperature limitations of the SHJ cell (200 C), which prevents the use of high temperature process, such as sintering of mesoporous TiO2.21–23 there are possibilities to deposit the n-type contact at lower temperatures,[24] and use temperature stable bottom cells,[25,26] strong absorption of the p-type top contacts was reported for n–i–p architectures.[14,27] An efficient device design was presented by Bush et al, who mitigated these losses

Methods

Results

Conclusion