Abstract
AbstractStochastic computing (SC) is an approximate computing paradigm using probabilities and aims at realizing circuits with low hardware cost. Basic operations (such as addition) have been comprehensively studied, whereas there are few studies on nonlinear operations (such as division and square root) in SC. In this paper, a stochastic division circuit is proposed by using maximally correlated input bitstreams to eliminate the necessity for distinguishing the divisor and dividend. Additionally, four stochastic square root circuits are designed with improved accuracy by decreasing the correlation between intermediate bitstreams via inserting delay elements. Experimental results show that both the proposed division and square root circuits achieve lower mean squared errors (MSEs) while requiring nearly the same hardware resources, compared with the state‐of‐the‐art designs. This result shows the potential in exploiting signal correlation in SC circuit design for high accuracy.
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