Abstract
High-level synthesis promises significant shortening of the design cycle compared to a design entry at RTL. However, many high-level synthesis implementations require extensive code alterations to ensure synthesisability and to achieve a quality of results comparable to handwritten RTL designs. These are especially important for programs with ‘irregular control flow’ and ‘complicated data dependencies’. In this chapter, we describe these terms in detail and elaborate on their implications for efficient high-level synthesis within the scope of a case study.
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