High-k / metal gate innovations enabling continued CMOS scaling

Abstract

High-k dielectrics and metal gate electrodes have entered complementary metal-oxide-semiconductor (CMOS) logic technology, integrated in both gate-first and gate-last schemes. We review gate-first high-k / metal gate (HKMG) innovations enabling continued device scaling to the 22 and 14 nm nodes and beyond. First, we summarize some of the insight that allowed early HKMG challenges such as equivalent oxide thickness (EOT) and threshold voltage control to be overcome. Then, we discuss HKMG approaches that enable ultimate EOT scaling, pitch scaling via borderless source/drain contact formation, and the fabrication of multi-gate field-effect transistors. Finally, we summarize recent progress in gate stack development for high-mobility channel materials such as germanium and III-V compound semiconductors.