High‐frequency IIR switched capacitor filter using parallel cyclic‐type circuit with low‐power consumption

Abstract

AbstractFIR transversal filters have been proposed using a parallel cyclic‐type circuit configuration which alleviates the performance degradation at higher frequencies due to the finite gain‐bandwidth product of op amps in switched capacitor filters. A parallel cyclic‐type circuit realizes the delay and weighting of the input signal with switches and capacitors without op amps. It is also of low‐power consumption because it requires only one op amp for its adder.This paper describes a method to implement direct form I IIR filters using a parallel cyclic‐type circuit. The performance degradation caused by the finite gain bandwidth product of the op amp and by parasitic capacitances is analyzed, both for the canonical circuit with the delay element using op amps and for the parallel cyclic‐type circuit. Also, a parallel cyclic‐type circuit is proposed for high‐frequency operations containing multiple adders. This circuit incorporates a novel feedback scheme using the “Look Ahead” calculation method. Finally, through experiments, the performance improvement by the parallel cyclic‐type circuits over the canonical and biquad circuits is demonstrated.