Abstract

This paper presents a novel approach to the design and fabrication of low-cost and high-gain aperture-coupled microstrip patch antenna (AC-MPA) arrays with improved radiation pattern for millimetre-wave applications such as simultaneous wireless information and power transfer (SWIPT) and Internet-of-Things (IoT) device connectivity. A higher-order mode substrate integrated waveguide (SIW) cavity is used to feed the MPA arrays through aperture coupling. The improved design approach is introduced and discussed in detail. Simulation and experimental results for 2 × 2 and 4 × 4 arrays are presented, demonstrating excellent agreement. Key performance metrics are side-lobe levels of less than −24 dB and −29 dB in the E-plane and −22 dB and −26 dB in the H-plane and realized gain of 11 dBi and 15 dBi for the 2 × 2 and 4 × 4 arrays respectively, at a design frequency of 30 GHz.

Highlights

  • Substrate integrated waveguide (SIW) technology has demonstrated certain advantages in its use in modern wireless communication systems [1,2,3]

  • Other important and related techniques include the use of nanoparticles [12] and 2D materials, especially graphene [13], which have given the fields of plasmonics and transformation optics a new impetus thanks to the control that these materials give over permittivity and permeability, without the ohmic losses associated with conventional conductors

  • Despite the many advantages of using the above mentioned technologies, the design and manufacture are complex and difficult as compared to the design approach proposed in this paper to enhance the radiation performance and directivity with very low side lobe levels by using a combination of dielectric materials to synchronize the aperture coupling from a higher order mode substrate integrated waveguide (SIW) cavity to the patch antenna array

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Summary

16 January 2019

Bilal T Malik , Viktor Doychinov , Syed Ali R Zaidi, Nutapong Somjit Charles W Turner.

Introduction
Array analysis and design procedure
Design methodology The array design methodology that we adopted is as follows:
Results and discussion
Conclusion

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