Abstract

Memristive crossbar arrays are finding application in a wide range of operations such as memory, in-memory-computing, analog computing, etc. The crossbar performance is limited by a sneak path current, which limits the array size and negatively affects power and noise margin. In this paper, we present a synthesis of one selector and one Memristor device (1S1R) unit based on nonlinear resistive selector connected in series with bipolar Memristor (MR) element. The selector provides a gating function to the MR to reduce the sneak path current. The operation and performance of the MR and the selector devices have been verified individually and when serially connected. The MR cell measurements show good repeatability over multiple SET-RESET cycles with $\mathbf{V}_{\mathbf{on}}\sim \mathbf{2.5}$ to 3 V, $\mathbf{R}_{\mathbf{off}}/\mathbf{R}_{\mathbf{on}}\sim \mathbf{10}^{\mathbf{4}}$ and $\mathbf{V}_{\mathbf{off}}\sim-\mathbf{0.6}$ to −1.5 V. The electrical parameters of the memristor cell have been extracted and correlated mathematically using the Voltage-Threshold Adaptive Model (VTEAM). Various array sizes ranging from $\mathbf{2} \times \mathbf{2}$ to $\mathbf{4,000}\times \mathbf{4,000}$ have been investigated using spice circuit simulator. The results show that the proposed configuration reduces the sneak path by 200 times when compared with a similar size array that does not use a selector device. Also, using the selector increases the crossbar read margin, device selectivity, and enables high memory array density up to $\mathbf{4}\mathbf{k}\times \pmb{4}\mathbf{k}$ compared to $\mathbf{512} \mathrm{x}\mathbf{512}$ state of the art. The device allows relatively low voltage operation of 4V/1V (write/read) compared to 5V/2V reported in literature, which makes it attractive for low power applications.

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