High-Work-Function Ir/HfLaO ${\rm p}$-MOSFETs Using Low-Temperature-Processed Shallow Junction

Abstract

We report a high effective work function (Phi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m-eff</sub> ) and a very low Vt Ir gate on HfLaO p-MOSFETs using novel self-aligned low-temperature shallow junctions. This gate-first process has shallow junctions of 9.6 or 20 nm that are formed by solid phase diffusion using SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -covered Ga or Ni/Ga. At 1.2-nm effective oxide thickness, good Phi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m-eff</sub> of 5.3 eV, low V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> of +0.05 V, high mobility of 90 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V-s at -0.3 MV/cm, and small 85degC negative bias-temperature instability (NBTI) of 20 mV (10 MV/cm for 1 h) are measured for Ir/HfLaO p-MOSFETs.