Abstract

High-voltage lateral double-implanted metal-oxide-semiconductor field-effect transistor on high-purity semi-insulating 4H-SiC substrate with dual field-plates on both gate and drain was experimentally demonstrated and analyzed by a simulation method. E-field crowding under gate and drain was successfully suppressed by the optimized dual field-plates so that high breakdown voltage of 1.6 kV was achieved at Ldrift = 20 μm. Also, we obtained a low Ron,sp (specific on-resistance) of 30 mΩ cm2 at Ldrift = 20 μm by shrinking the channel length and controlling doping concentration of a drift region.

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