High voltage GaN vertical FinFET with a compatible integrated fin diode for low reverse conduction loss

Abstract

A high-voltage normally-off GaN vertical FinFET with a compatible integrated Fin Diode (FD-FinFET) is proposed to improve reverse conduction performance. The Fin channel combined with the ohmic contact source covering the Fin sidewalls forms the Metal-Insulator- Semiconductor (MIS) structure to control the conduction/blocking characteristics of the FD. In the reverse conduction (VDS < 0 V), the FD easily turns on by the narrowing depletion region of the MIS and thus significantly reduces the turn-on voltage (VRT). With the increasing VSD, electron accumulation layers are formed along the Fin sidewalls and thus greatly improve the reverse current capacity. In the forward conduction and blocking state (VDS > 0 V and VGS > or = 0 V), the threshold voltage (VTH) and breakdown voltage (BV) of the FD-FinFET are hardly influenced by the FD because the FD channel is pinched off by the depletion effect. Therefore, a low VRT and a high VTH can be obtained synchronously. Consequently, when the gate biased-voltage (VGS) varies from 0 V to −3 V, the FD-FinFET can keep a low VRT of 0.49 V, while the VRT of the Con. FinFET rises significantly from 1.11 V to 4.11 V. Besides, it exhibits a high BV of 1725 V. The proposed structure not only avoids the difficulty of p-type doping, but also provides a new design concept to obtain a low reverse conduction loss, maintaining high forward conduction and blocking performances.