Year-end Sale % OFF 
Abstract
A high-voltage extended drain MOS (EDMOS) transistor with a dual work function gate (DWFG) is discussed. This device enhances device performance by modifying the electric field in the channel. For DWFG EDMOS device fabrication, the polycrystalline silicon gates on the source and drain sides are doped by p + and n + ion implantation, respectively. Experimental results from the fabricated DWFG EDMOS devices show improved transconductance (g m), drain conductance (g ds) and specific on-resistance (R ON) characteristics without breakdown voltage reduction.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
