Abstract
Polar codes can provably achieve the capacity of a symmetric binary discrete memoryless channel and have low encoding and decoding complexity. However, the error rate performance of polar codes decoding in short and moderate length is not very well, moreover, the encoding and decoding of polar codes with the conventional serial mode will lead to poor throughput. In this paper, we propose a hardware architecture of parallel encoding and decoding scheme for polar codes concatenation with LDPC, and take advantage of the parallelism of belief propagation (BP) decoding algorithm of the two codes to reduce the decoding delay. We compare the performance of concatenated scheme with polar codes and investigate the throughput implemented on graphic processing unit (GPU) for Gaussian channel. Experiment results show that the performance of the concatenated scheme outperform only polar codes, and the throughput of the proposed parallel architecture is obviously faster than that of the serial.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.