Abstract
We have shown that considerable vacancy defects, introduced by MeV Si self-ion implantation, can survive a 900°C∕5min annealing for gate formation. By analyzing the trap-limited Si interstitial diffusion, we have characterized these vacancy clusters. Furthermore, we show that the remaining vacancies are sufficient to reduce B diffusion. The study suggests that MeV ion implantation, a promising approach for ultrashallow junction formation in metal-oxide-semiconductor device fabrication, can be inserted before gate formation (involving high temperature annealing) to avoid irradiation damage on gate structures.
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