High-temperature superconducting Josephson Vortex Flow Transistors: numerical simulations and experimental results

Abstract

Josephson Vortex Flow Transistors (JVFTs) based on high transition temperature superconductors (HTS) are promising candidates for three-terminal devices, which may be used e.g. at the interface between superconducting and semiconducting electronics. We have investigated the performance of JVFTs based on parallel arrays and on long HTS Josephson junctions, both theoretically and experimentally. Our numerical simulation results reveal the dependence of the current gain on various device parameters, such as number of junctions, loop size, and screening parameter /spl beta/=L/L/sub j/, where L is the loop inductance and L/sub j/ the Josephson inductance of a single junction. We have fabricated various devices using symmetrically and asymmetrically injected bias currents. The experimental results are in good agreement with our simulation results and it is shown that for asymmetric devices high values of the current gain above 20 can be obtained for temperatures below 60 K.