High temperature characterization of normally-on 4H-SiC junction field-effect transistor

Abstract

SiC JFETs are considered to be the most promising high-temperature switches. In this paper, the electro-thermal simulation is conducted to investigate the performance and junction temperature of SiC normally-on JFET. The current density will degrade by more than 30% due to the self-heating effect even at room temperature. For a given device, the increase of the gate voltage can help to improve the current density. But the most efficient way to improve the high temperature performance of SiC JFETs is to optimize the structure parameters in design. When the channel width increases from 1.6 μm to 2 μm or the drift-layer width decreases from 14 μm to 7 μm at 300 K, the current handling ability can increase to double or treble even at a small bias. In this case, the junction temperature variation is less than 5 K, which will greatly reduce the device size and improve the reliability.