High speed simulation scheduler for Cassini spacecraft

Abstract

The Cassini spacecraft will soon journey to Saturn to perform a close-up study of the Saturnian system. Sequences of commands will be sent to the spacecraft by ground personnel to control every aspect of the mission. To validate and verify these command sequences, a bit-level, high-speed simulator (HSS) has been developed. The HSS runs faster than the actual hardware and thus allows time to fix problems in the sequences before they are uploaded to the spacecraft. To maximize performance, the HSS is implemented with multiple threads and runs on a multiprocessor system. A key component of the HSS is the scheduler, which controls the execution of the simulator. The general framework of the scheduler can be adapted to solve a wide variety of scheduling problems. The architecture of the scheduler is presented first, followed by a discussion of issues related to performance and multiple threads. Finally, the avoidance of deadlocks and race conditions is discussed and an informal proof for the absence of both in the scheduler is described.