Abstract
The work focuses on the design of a high speed, low power track-and-hold amplifier (THA) for ten-bit 100 MS/s pipelined analogue-to-digital converter (ADC). A wide bandwidth and high gain two-stage operational transconductance amplifier (OTA) is selected as OTA of THA. This OTA consumes less amount of power and produce less thermal noise. The bootstrap technique is employed to reduce the non-linearity error associated with the input signal. The signal swing of the circuit is allowed to exceed the supply voltage (1.8 V), which further reduces the thermal noise contributed by the circuit and increases the dynamic range (DR) of the circuit. The circuit is implemented in UMC 180 nm digital CMOS technology. The THA circuit along with the biasing circuit consumes 5.706 mW power and it achieves 81.23 dB as the spurious free dynamic range (SFDR) for 2 V output at 100 MHz sampling rate. The dynamic range of the THA is 85.94 dB. The proposed THA is simulated using SPECTRE simulator under a variety of process and temperature conditions.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: International Journal of High Performance Systems Architecture
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
