Abstract
A new CMOS voltage comparator circuit capable of resolving 300 ?V has been designed and implemented using a 5 ?m CMOS process. Differential signal paths are used to eliminate the residual offset voltage caused by clock feedthrough and the channel charge pumping effect in MOS switches. The regenerative action of the output latch is used to provide high voltage gain and high operating speed. The circuit performance does not depend on any critical device geometries, and consequently the circuit is scalable. If a finer geometry CMOS process were used, still higher resolution and faster operating speed could be expected.
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