High‐speed analogue sampled‐data signal processing for real‐time fault location in electrical power networks

Abstract

The emulation of low-loss or lossless one-dimensional (1D) or 2D transmission mediums using analogue sampled-data signal processing is presented. Based on discrete-time wave propagation simulation, transmission lines are emulated with many elementary identical delay elements, implemented by simple equivalent switched-capacitor (SC) circuits. The accuracy and limitations of this discrete time model are studied in the frame of power network fault location using electromagnetic time-reversal principle. The sensitivities to non-ideal effects usually plaguing analogue CMOS SC circuits, such as amplifier finite open-loop gain, offset, and parasitic charge injection due to clock feedthrough, are evaluated in the same context. It is shown that the SC line emulation is well suited to the presented fault location technique and considerably reduces the fault location time (by a factor up to 100) in comparison to standard digital solutions, allowing fault location resolutions of typically 1% within a few hundred milliseconds. These expectations are confirmed by measurements realised on the presented line model integrated-circuit, implemented in an AMS 0.35 μm CMOS process. The speed improvement obtained through the presented method is essential, potentially allowing real-time fault management in power grids.