High resolution FPGA pulse width modulation control of full‐bridge DC–DC converters

Abstract

This study describes a field-programmable gate arrays (FPGAs) based technique, which aims to significantly improve the resolution of complementary drivers in full-bridge DC–DC converters. An algorithm for precise adjustment of both the duty cycle and the frequency of the pulse width modulator (PWM) is presented. It is experimentally verified by software simulation and FPGA hardware implementation. The results prove that the designed 12-bit digital PWM is able to provide switching frequency of 100 kHz in the range of 99.61 [99.51–99.70] kHz [mean value (95% confidence interval)] using clock frequency of just 160 MHz. In comparison, the conventional counter-based PWM gives the same output resolution at operating frequency of 410 MHz. In addition, the proposed algorithm is scalable and could be used to provide better resolution even at higher clock frequencies >400 MHz. For example, if phase-locked loop is 480 MHz then the conventional counter for 100 kHz PWM has a resolution slightly >12 bits, while the proposed algorithm could extend the resolution up to 14 bits. Due to the high reliability of the FPGA technology, the proposed PWM control is applicable in highly critical medical systems, such as electrosurgical devices.