Abstract

Picosecond power pulse generators based on silicon avalanche shapers (SAS) have such advantages as high reliability, compactness, low jitter, but their pulse repetition frequency (PRF) was usually limited at several thousand pulses per second (pps) because of the following reasons. SAS had long turn off time due to the minority carriers existence after the turn on process. Circuits, which were used to modulate SAS, with power modulator thyristors as primary switches, could not provide the efficient work at high PRF. We overcame these limitations by use on the next means. The specially doped series of SAS, which combine fast turn on time and low jitter with high reliable work at tens kpps repetition rates, has been developed, tested and produced. The new control circuit schematic, based on drift step recovery diodes (DSRD) and transistors (DSRT), has been designed. This circuit is able to generate stable driving signals to switch SAS up to hundreds kpps. As a result, the developed power pulse generator has the following parameters: output pulse amplitude (on 50 Ohms) 1 kV; rise time 80 ps; pulse width 220 ps; jitter <30 ps; maximal PRF 50 kpps; total power consumption at max. PRF <5W; lifetime 10/sup 11/ pulses and size (version with DC power supply) 110/spl times/50/spl times/40 mm. It should be mentioned that the high time stability of output pulses gives a possibility to combine total power of many generators into a load.

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