High-Reliability, Reconfigurable, and Fully Non-volatile Full-Adder Based on SOT-MTJ for Image Processing Applications

Abstract

With the advent of the era of big data, applications such as image processing are facing the bottleneck of power consumption and speed. Magnetic tunnel junctions (MTJs) offer advantages such as low power consumption, low interconnect latency, compatibility with CMOS technology, and inherent non-volatility. Therefore, hybrid MTJ and CMOS design is considered an effective means to overcome these limitations. This brief focuses on a reconfigurable non-volatile (NV) architecture through which different performance fully NV full adders (NV-FAs) are implemented based on MTJ devices with spin-orbit torque (SOT) switching. We verified and compared our proposed designs with previous work using the 28 nm process design kit and SOT-MTJ model, and the results show that our design has up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.6\times $ </tex-math></inline-formula> fewer delays than the state-of-the-art. In addition, we verified the cascade of the NV-FA and used the cascaded 8-bit NV-FA for image processing, and the peak signal-to-noise ratio of the image after Gaussian filtering was improved by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.17\times $ </tex-math></inline-formula> .