Abstract
This paper presents an approach to developing high quality tests for switch-level circuits using both current. and logic test generation algorithms. Clear definitions for analyzing the effectiveness of the joint !,est generation approach are derived. Results on a set of switch-level circuits show very high coverage of stuickat, st,uck-on, and stuck-open faults when both current and logic tests are used.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.