High Precision Low Temperature Direct Wafer Bonding Technology for Wafer-Level 3D ICs Manufacturing

Abstract

The development of low temperature direct wafer bonding processes paved the way for new categories of applications based on semiconductor devices. Precise optical alignment of wafers prior wafer bonding plays a key role in manufacturing of current and future applications based on wafers stacking. In order to address the continuous feature size shrinking and increasing integration levels the need for high alignment accuracy imposed significant hardware and process improvements. The future microelectronics applications are foreseen to require wafer-to-wafer alignment accuracy as low as ±100 nm and better. This work reviews the main contributors to the misalignment budget and presents experimental alignment results for alignment accuracy in the range of 50 – 100 nm.