High-Precision CMOS Analog Computational Circuits Based on a New Linearly Tunable OTA

Abstract

Implementation of CMOS current-mode analog computational circuits are presented in this paper. A new Linearly Tunable OTA is employed in a modified structure as a basic building block for implementation of the circuits either linear or nonlinear functions. The proposed trans- conductance amplifier provides a constant Gm over a wide range of input voltage which allows the implementation of high precision computational circuits including square rooting, squaring, multiplication and division functions. Layout pattern of the proposed circuit confirms that the circuit can be implemented in 102 �� m × 69 �� m active area. In order to verify the performance of the circuits, the post layout simulation results are presented through the use of HSPICE and Cadence with TSMC level 49 (BSIM3v3) parameters for 0.18 �� m CMOS technology, where under supply voltage of 1.8 V, the maximum relative error of the circuits within 500 o A of input range is about 11 �� A (2.2 % error) and the THD remains as low as 1.2 % for the worst case. Moreover, the power dissipation of the complete structure is found to be 0.66 mW.