High-performance silicon nanowire field-effect transistor with silicided contacts

Abstract

Undoped silicon nanowire (Si NW) field-effect transistors (FETs) with a back-gate configuration have been fabricated and characterized. A thick (200 nm) Si3N4 layer was used as a gate insulator and a p++ silicon substrate as a back gate. Si NWs have been grown by the chemical vapour deposition method using the vapour–liquid–solid mechanism and gold as a catalyst. Metallic contacts have been deposited using Ni/Al (80 nm/120 nm) and characterized before and after an optimized annealing step at 400 °C, which resulted in a great decrease in the contact resistance due to the newly formed nickel silicide/Si interface at source and drain. These optimized devices show a good hole mobility of around 200 cm2 V−1 s−1, in the same range as the bulk material, with a good ON current density of about 28 kA cm−2. Finally, hysteretic behaviour of NW channel conductance is discussed to explain the importance of NW surface passivation.