High-Performance Oversampling ADCs

Abstract

AbstractModern wireless communications dictate wideband high-resolution ADCs (analog-to-digital converters) with excellent power efficiency. In such context, delta-sigma modulators achieve the goal by utilizing the oversampling property in suppressing the in-band quantization noise. This chapter outlines examples of various oversampling ADCs that reached state-of-the-art performance with excellent power efficiency. The first and second examples are the continuous-time implementation of delta-sigma modulators with the inherent anti-aliasing property, covering a wide bandwidth (BW) of 50–100 MHz. They employ multibit quantization and DAC (digital-to-analog converter) feedback for wide dynamic range, with specific emphasis on the ELD (excess loop delay) compensation, while the third and fourth designs are discrete-time examples based on the modification of the Nyquist Pipeline SAR converter, transforming themselves into the corresponding oversampling counterparts. We utilized dynamic amplifiers in the residue amplifier of the pipeline SAR to obtain excellent power efficiencies. This chapter offers all the detailed design considerations.KeywordsCMOSAnalog-to-digital converter (ADC)OversamplingDelta-sigma modulator (DSM)Continuous-time DSM (CT DSM)Noise shaping (NS)Successive approximation register (SAR)Pipeline SAR ADC