Abstract

A high-bit rate and low-bias voltage waveguide-integrated vertical germanium avalanche photodetector is reported with doping optimization. This scheme alleviates the necessity of complex epitaxial single-crystal silicon layer and multiple ion implantation schemes. The optical absorption and carrier avalanche multiplication gain occur in the same germanium layer. The maximum gain is estimated to be 112.4 at an input power of -30.2dBm. With the input optical power of -16.1dBm, the gain-bandwidth product of nearly 141 GHz is obtained at 7.8 V bias. Meanwhile, a 4.6 dB sensitivity improvement for 60 Gbit/s signal reception is demonstrated with an avalanche gain of 5.1 at a soft-decision forward-error correction threshold (SD-FEC), i.e., bit-error-rate of 2×10-2. The absolute sensitivities of photonics receivers are -21, -18.6, -15.9, and -11.5dBm for 40, 60, 80, and 100 Gbit/s non-return-to-zero signals at the SD-FEC threshold. These demonstrated characteristics enable the reliable and robust on-chip photodetection for energy efficienct silicon photonic interconnects in the future.

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