Abstract

GaAs MESFETs with advanced LDD structure have been developed by using a single resist-layered dummy gate (SRD) process. The advanced LDD structure suppresses the short channel effects, and reduces source resistance, while maintaining a moderate breakdown voltage. The 0.3-/spl mu/m enhancement-mode devices exhibit a transconductance of 420 mS/mm, while the breakdown voltage of the depletion-mode device (V/sub th/=-500 mV) is larger than 6 V. The standard deviation of the threshold voltage for 0.3-/spl mu/m devices is less than 30 mV across a 3-in wafer. The 0.3-/spl mu/m devices exhibit an average cutoff frequency of 47.2 GHz with a standard deviation of 1.3 GHz across a 3-in wafer. The cutoff frequency of a 0.15-/spl mu/m device is as high as 72 GHz. D-type flip-flop circuits for digital IC applications and preamplifier for analog IC applications fabricated with 0.3-/spl mu/m gate length devices operate above 10 Gb/s. In addition, the 0.3-/spl mu/m devices also show good noise performance with a noise figure of 1.1 dB with associated gain of 6.5 dB at 18 GHz. These results demonstrate that GaAs MESFETs with an advanced LDD structure are quite suitable for digital, analog, microwave, and hybrid IC applications.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.