High-Mobility TaN/$\hbox{Al}_{2}\hbox{O}_{3}$/Ge(111) n-MOSFETs With RTO-Grown Passivation Layer

Abstract

We report the fabrication of high-electron-mobility Ge(III) n-MOSFETs using a novel and simple approach to passivate a Ge surface by rapid thermal oxidation (RTO). A thin interfacial GeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layer is formed by RTO, which passivates the high-k/Ge interface. The GeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -passivated n-MOSFETs fabricated using a gate-first self-aligned process with high-k/metal gate demonstrate a high peak effective mobility (μ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</sub> ~ 713 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> · V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> · s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> ) with ~2x enhancement over control Si(100) devices. Moreover, at a drain bias of 1 V and at a gate overdrive of 1.2 V, Ge MOSFETs (L ~ 75 μm) show a drive current of ~1.1 mA/ mm, which is ~1.6 X higher than that of the control Si devices. In addition, a good subthreshold slope of ~130 mV/decade and an Jon/-Toff ratio ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> were achieved using the GeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interfacial layer formed by RTO.