Abstract
This letter presents high-linearity 0.13-mum CMOS devices based on field-plate technology. The field-plate technology reduces the electric field between the gate and drain terminals, subsequently forming a field-plate-induced depletion region and reducing the leakage current to significantly improve linearity and power of the CMOS devices. The third-order intermodulation product of 0.13-mum NMOS devices with and without field-plate technology are -41.8 and -32.4 dBm, respectively, for input power of -10 dBm. Experimental results indicate that the field-plate architecture exhibits high linearity and power for CMOS RFIC applications
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.